DATA SHEET
SILICONDRIVE 1.8" DRIVE
SSD-HXXX(I)-3650
OVERVIEW
SISECURE
PowerArmor Eliminates drive corruption.
SiliconDrive combines all the high
performance, high reliability, and multiyear
lifecycle benefits of the standard
SiliconDrive with a comprehensive suite of
patented and patent-pending technologies
that provide multiple security options to
safeguard application data and software IP
in embedded systems.
SiZone
Data zones with different
security parameters.
SiKey
Ties SiliconDrive to a specific
host and/or software IP.
SiProtect
Protection software for
password-required, read/
write, or read-only access.
SiSweep
SiPurge
Ultra-fast data erasure.
Non-recoverable data
erasure.
Applications requiring advanced levels of
security such as data recorders, wearable
and field computers, medical monitoring
and diagnostic equipment, POS systems,
and voting machines are able to activate
security options to protect application data
and software IP from theft, falling into the
wrong hands from deployments in high-
risk areas, corruption, and accidental or
malicious overwrites.
FEATURES
• RoHS 6 of 6 compliant
• Integrated PowerArmor, SiSMART, and
SiSecure technologies
• Capacity range: 32MB to 16GB
• Supports both 8-bit and 16-bit data
register transfers
• Supports 5V interface
• Data reliability <1 error in 1014 bits read
• MTBF >4,000,000 hours
PowerArmor prevents data corruption and
loss from power disturbances by
integrating patented technology into every
SiliconDrive.
• ATA-3 compliant
• Industry Hitachi 1.8" Drive form factor
• Supports PIO modes 0-4 and DMA
modes 0-2
SiSMART acts as an early warning system
to eliminate unscheduled downtime by
constantly monitoring and reporting the
exact amount of remaining storage system
useful life.
16GB
SSD-H16G(I)-3650
SiSecure is a comprehensive suite of user-
selectable security technologies that
solves the critical need for robust storage
security
for
embedded
systems
applications that have a small footprint and
low-power requirement.
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26840 ALISO VIEJO PARKWAY, ALISO VIEJO, CA 92656 • PHONE: 949.900.9400 • FAX: 949.900.9500 • http://www.siliconsystems.com
DOCUMENT: 3650H-02DSR
JUNE 17, 2008
TABLE OF CONTENTS
SSD-HXXX(I)-3650 DATA SHEET
TABLE OF CONTENTS
Overview.......................................................................................................................... i
SiSecure........................................................................................................................... i
Features........................................................................................................................... i
Physical Specifications................................................................................................. 1
Product Specifications.................................................................................................. 3
System Reliability......................................................................................................... 3
Electrical Specification.................................................................................................. 5
ATA and True IDE Register Decoding ........................................................................ 14
Task File Register Specification................................................................................. 14
ATA Registers............................................................................................................... 15
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PAGE III
SSD-HXXX(I)-3650 DATA SHEET
TABLE OF CONTENTS
Error Register............................................................................................................. 15
Sector Count Register................................................................................................ 17
Drive/Head Register................................................................................................... 21
ATA Command Block and Set Description................................................................ 27
Check Power Mode — 98h, E5h.......................................................................... 29
Executive Drive Diagnostic — 90h....................................................................... 30
Identify Drive — Drive Attribute Data ............................................................. 33
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DOCUMENT: 3650H-02DSR
TABLE OF CONTENTS
SSD-HXXX(I)-3650 DATA SHEET
Sales and Support ....................................................................................................... 63
Part Numbering............................................................................................................ 63
Nomenclature............................................................................................................. 63
Related Documentation............................................................................................... 65
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SSD-HXXX(I)-3650 DATA SHEET
TABLE OF CONTENTS
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DOCUMENT: 3650H-02DSR
LIST OF FIGURES
SSD-HXXX(I)-3650 DATA SHEET
LIST OF FIGURES
Figure 1: Physical Dimensions......................................................................................... 1
Figure 2: Pin Locations .................................................................................................... 2
Figure 3: Jumper Settings................................................................................................ 2
Figure 4: I/O Access Read Timing Diagram .................................................................. 10
Figure 5: I/O Access Write Timing Diagram................................................................... 11
Figure 6: True IDE Read/Write Access Timing Diagram ............................................... 12
Figure 7: True IDE Multiword DMA Read/Write Access Timing..................................... 13
Figure 8: Sample Label.................................................................................................. 65
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LIST OF FIGURES
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DOCUMENT: 3650H-02DSR
LIST OF TABLES
SSD-HXXX(I)-3650 DATA SHEET
LIST OF TABLES
Table 1: Physical Dimensions.......................................................................................... 1
Table 2: System Performance ......................................................................................... 3
Table 3: System Power Requirements ............................................................................ 3
Table 4: System Reliability............................................................................................... 3
Table 5: Product Capacity Specifications ........................................................................ 4
Table 6: Environmental Specifications............................................................................. 4
Table 7: Pin Assignments ................................................................................................ 5
Table 8: Signal Descriptions ............................................................................................ 6
Table 9: Absolute Maximum Ratings ............................................................................... 8
Table 10: Capacitance..................................................................................................... 8
Table 11: DC Characteristics........................................................................................... 9
Table 12: I/O Access Read Timing ................................................................................ 10
Table 13: I/O Access Write Timing ................................................................................ 11
Table 14: True IDE Read/Write Access Timing ............................................................. 12
Table 15: True IDE Multiword DMA Read/Write Access Timing.................................... 13
Table 16: Task File Register Specification..................................................................... 14
Table 17: Error Register................................................................................................. 15
Table 18: Feature Register ............................................................................................ 16
Table 19: Sector Count Register.................................................................................... 17
Table 20: Sector Number Register ................................................................................ 18
Table 21: Cylinder Low Register.................................................................................... 19
Table 22: Cylinder High Register................................................................................... 20
Table 23: Drive/Head Register....................................................................................... 21
Table 24: Status Register .............................................................................................. 22
Table 25: Command Register........................................................................................ 23
Table 26: Alternate Status Register............................................................................... 24
Table 27: Device Control Register................................................................................. 25
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PAGE IX
SSD-HXXX(I)-3650 DATA SHEET
LIST OF TABLES
Table 28: Device Address Register ............................................................................... 26
Table 29: ATA Command Block and Set Description .................................................... 27
Table 30: ATA Command Set........................................................................................ 27
Table 31: Check Power Mode — 98h, E5h.................................................................... 29
Table 32: Executive Drive Diagnostic — 90h................................................................. 30
Table 33: Format Track — 50h...................................................................................... 31
Table 34: Identify Drive — ECh ..................................................................................... 32
Table 35: Identify Drive — Drive Attribute Data............................................................. 33
Table 36: Idle — 97h, E3h ............................................................................................. 35
Table 37: Idle Immediate — 95h, E1h ........................................................................... 36
Table 38: Initialize Drive Parameters — 91h ................................................................. 37
Table 39: Recalibrate — 1Xh......................................................................................... 38
Table 40: Read Buffer — E4h........................................................................................ 39
Table 41: Read DMA — C8h ......................................................................................... 40
Table 42: Read Multiple — C4h..................................................................................... 41
Table 43: Read Sector — 20h, 21h ............................................................................... 42
Table 44: Read Long Sector(s) — 22h, 23h .................................................................. 43
Table 45: Read Verify Sector(s) — 40h, 41h................................................................. 44
Table 46: Seek — 7Xh................................................................................................... 45
Table 47: Set Features — EFh ...................................................................................... 46
Table 48: Set Features’ Attributes ................................................................................. 46
Table 49: Set Multiple Mode — C6h.............................................................................. 47
Table 50: Set Sleep Mode — 99h, E6h ......................................................................... 48
Table 51: Standby — 96h, E2h...................................................................................... 49
Table 52: Standby Immediate — 94h, E0h.................................................................... 50
Table 53: Write Buffer — E8h........................................................................................ 51
Table 54: Write DMA — CAh......................................................................................... 52
Table 55: Write Multiple — C5h..................................................................................... 53
Table 56: Write Sector(s) — 30h, 31h ........................................................................... 54
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JUNE 17, 2008
DOCUMENT: 3650H-02DSR
LIST OF TABLES
SSD-HXXX(I)-3650 DATA SHEET
Table 57: Write Long Sector(s) — 32h, 33h .................................................................. 55
Table 58: Erase Sector(s) — C0h.................................................................................. 56
Table 59: Request Sense — 03h................................................................................... 57
Table 60: Extended Error Codes ................................................................................... 57
Table 61: Translate Sector — 87h................................................................................. 58
Table 62: Wear-Level — F5h......................................................................................... 59
Table 63: Write Multiple w/o Erase — CDh ................................................................... 60
Table 64: Write Sector(s) w/o Erase — 38h .................................................................. 61
Table 65: Write Verify — 3Ch ........................................................................................ 62
Table 66: Part Numbering Nomenclature ...................................................................... 63
Table 67: Part Numbers................................................................................................. 64
Table 68: Related Documentation ................................................................................. 65
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SSD-HXXX(I)-3650 DATA SHEET
LIST OF TABLES
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DOCUMENT: 3650H-02DSR
PHYSICAL SPECIFICATIONS
SSD-HXXX(I)-3650 DATA SHEET
PHYSICAL SPECIFICATIONS
The SiliconDrive 1.8" Drive products are offered in an industry-standard 1.8"
Drive capacities.
PHYSICAL DIMENSIONS
This section provides diagrams that describe the physical dimensions for the
1.8" Drive.
Figure 1: Physical Dimensions
Table 1: Physical Dimensions
Tolerance
(mm)
Tolerance
(mm)
Dimension Millimeters
Dimension Millimeters
A
B
C
D
E
F
G
H
I
60.00
57.05
3.20
±0.25
±0.25
±0.10
±0.25
±0.25
±0.10
±0.125
±0.125
±0.25
±0.0125
K
L
6.90
2.82
57.05
2.95
5.19
11.57
2.00
11.71
3.00
±0.125
±.10
M
N
P
Q
R
S
T
±0.25
±0.10
±0.125
±0.125
±0.10
±0.125
±0.10
69.85
66.65
2.95
6.55
5.25
63.85
.35
J
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SSD-HXXX(I)-3650 DATA SHEET
PIN LOCATIONS
PHYSICAL SPECIFICATIONS
The following diagram identifies the pin locations of the 1.8" Drive.
Figure 2: Pin Locations
JUMPER SETTINGS
The following diagram defines the SiliconDrive 1.8" Drive jumper settings.
Figure 3: Jumper Settings
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DOCUMENT: 3650H-02DSR
PRODUCT SPECIFICATIONS
SSD-HXXX(I)-3650 DATA SHEET
PRODUCT SPECIFICATIONS
Note: All SiliconDrive 1.8" Drive values quoted are typical at 25°C and
nominal supply voltage.
SYSTEM PERFORMANCE
Table 2: System Performance
Reset to Ready Startup Time (Typical/Maximum) 200ms/400ms
Read Transfer Rate (Typical)
Write Transfer Rate (Typical)
Burst Transfer Rate
8MBps
6MBps
16.7MBps
2ms (maximum)
Controller Overhead (Command to DRQ)
SYSTEM POWER REQUIREMENTS
Note: The 5V is the only operation for the 16GB capacity.
Table 3: System Power Requirements
DC Input Voltage
5.0 ± 10%
Sleep (Standby Current)
Read (Typical/Peak)
Write (Typical/Peak)
>1.0mA
30mA/100mA
40mA/100mA
SYSTEM RELIABILITY
Table 4: System Reliability
MTBF (@ 25ºC)
Data Reliability
>4,000,000 hours
14
<1 non-recoverable error in 10 bits read
>2,000,000 write/erase cycles
10 years
Endurance
Data Retention
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SSD-HXXX(I)-3650 DATA SHEET
PRODUCT SPECIFICATIONS
PRODUCT CAPACITY SPECIFICATIONS
Table 5: Product Capacity Specifications
Formatted
Capacity
(Bytes)
Numberof
Sectors/
Track
Product
Capacity
Number of Number of Number
Sectors
Cylinders of Heads
32MB
64MB
128MB
256MB
512MB
1GB
32,702,464
65,601,536
130,154,496
260,571,136
521,773,056
63,872
499
2
32
32
32
32
63
63
63
63
63
63
128,128
254,208
508,928
1,019,088
1001
993
4
8
994
16
16
16
16
16
16
16
1011
2030
4066
8186
1,047,674,880 2,046,240
2,098,446,336 4,098,528
4,224,761,856 8,251,488
2GB
4GB
8GB
8,455,200,768 16,514,064 16,383*
16,494,428,160 32,215,680 16,383*
16GB
* = All IDE drives 8GB and larger use 16383 cylinders, 16 heads, and 63 sectors/track due to
interface restrictions.
ENVIRONMENTAL SPECIFICATIONS
Table 6: Environmental Specifications
Temperature
0ºC to 70ºC (Commercial)
-40ºC to 85ºC (Industrial)
8% to 95% non-condensing
Humidity
Vibration
16.3gRMS, MIL-STD-810F, Method 514.5, Procedure I,
Category 24
Shock
1000G, Half-sine, 0.5ms Duration
50g Pk, MIL-STD-810F, Method 516.5, Procedure I
80,000ft, MIL-STD-810F, Method 500.4, Procedure II
Altitude
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DOCUMENT: 3650H-02DSR
ELECTRICAL SPECIFICATION
SSD-HXXX(I)-3650 DATA SHEET
ELECTRICAL SPECIFICATION
PIN ASSIGNMENTS
The following table describes the SiliconDrive 1.8" Drive 44-pin IDE connector
signals.
Table 7: Pin Assignments
Pin
IDE-ATA
Pin
IDE-ATA
1
-RESET
D7
2
GND
D8
3
4
5
D6
6
D9
7
D5
8
D10
9
D4
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
D11
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
D3
D12
D2
D13
D1
D14
D0
D15
GND
DMARQ
-IOWR
-IORD
IORDY
-DMACK
INTRQ
A1
KEY
GND
GND
GND
-CSEL
GND
-IOCS16
-PDIAG
A2
A0
-CS0
-DASP
-CS1
GND
V
V
CC
CC
43
GND
44
NC
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SSD-HXXX(I)-3650 DATA SHEET
SIGNAL DESCRIPTIONS
ELECTRICAL SPECIFICATION
Table 8: Signal Descriptions
Type Description
Signal Name Pin(s)
A2-A0
36, 33,
35
I
Address Inputs. These signals are
asserted by the host to access the task
registers in the device.
-CS0,-CS1
37, 38
I
In the true IDE mode, -CS0 is the chip
select for the task file registers while -CS1
is used to select the Alternate Status
register and the Device Control register.
-CSEL
28
I
Cable Select. This internally pulled-up
signal is used to configure this device as a
master or a slave when the jumper
configuration is in CSEL mode.
When this pin is:
• Grounded by the host, this device is
configured as a master.
• Open, this device is configured as a
slave.
D15-D0
18, 16,
14, 12,
10, 8, 6,
4, 3, 5, 7,
9, 11, 13,
15, 17
I/O
Data Inputs/Outputs. This is the 8-bit or
16-bit bidirectional interface between the
host and device. The lower eight bits are
used for 8-bit register transfers.
-DMACK
29
39
I
DMA Acknowledge. This signal is used by
the host in response to DMARQ to initiate
DMA transfers. The DMARQ/-DMACK
handshake is used to provide flow control
during the transfer. When -DMACK is
asserted, -CS0 and -CS1 are not asserted
and transfers are 16-bits wide.
DASP
I/O
Disk Active/Slave Present. This open
drain output signal is asserted low any time
the drive is active. In a master/slave
configuration, this signal is used by the
slave to inform the master that a slave is
present.
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DOCUMENT: 3650H-02DSR
ELECTRICAL SPECIFICATION
SSD-HXXX(I)-3650 DATA SHEET
Table 8: Signal Descriptions (Continued)
Signal Name Pin(s) Type Description
DMARQ 21 DMA Request. This signal is used for DMA
O
transfers between the host and device.
DMARQ is asserted by the device when the
device is ready to transfer data to/from the
host. The direction of data transfer is
controller by -IORD and -IOWR. This signal
is used in a handshake manner with
-DMACK (i.e., the device waits until the
host asserts -DMACK before negating
DMARQ, and reasserts DMARQ if there is
more data to transfer). The DMARQ/
-DMACK handshake is used to provide flow
control during the transfer.
GND
2, 19, 22, -
24, 26,
30, 40,
43
Ground. The device ground signal.
INTRQ
IORDY
31
O
Interrupt Request. This signal is an active
high interrupt request to the host.
27
I
I
I/O Channel Ready. The signal is negated
to extend the host transfer cycle of any host
register access.
-IORD
25
23
Device I/O Read. This is the read strobe
signal from the host. The falling edge of
IORD enables data from the device onto
the data bus. The rising edge of IORD
latches data at the host. The host does not
act on the data until it is latched.
-IOWR
I
Device I/O Write. This is the write strobe
signal from the host. The rising edge of
IOWR# latches data from the data bit
signals. The device does not act on the
data until it is latched.
KEY
20
34
-
Key. Reserved for the Connector Key.
-PDIAG
I/O
Pass Diagnostic. This open drain signal is
asserted by the slave to indicate to the
master that it has passed its diagnostics.
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SSD-HXXX(I)-3650 DATA SHEET
ELECTRICAL SPECIFICATION
Table 8: Signal Descriptions (Continued)
Signal Name Pin(s) Type Description
-RESET
1
I
Device Reset. An active low signal. When
active, this signal sets all internal registers
to their default state. This signal is held
asserted until at least 25μs after power has
been stabilized during the device power-on.
V
41, 42
-
Device Power Supply. The device power
CC
5V signal.
ABSOLUTE MAXIMUM RATINGS
Table 9: Absolute Maximum Ratings
Parameter Minimum Maximum Units
Symbol
Ts
Storage Temperature
Operating Temperature
-55
-40
125
85
°C
°C
T
A
V
V
with Respect to GND
-0.3
6.7
V
CC
CC
Vin
Input Voltage
-0.5
-0.3
6.0
5.8
V
V
Vout
Output Voltage
CAPACITANCE
Table 10: Capacitance
Symbol
Parameter
Maximum
Units
Cin
Input Capacitance
35
35
35
pF
pF
pF
Cout
CI/O
Output Capacitance
Bidirectional Capacitance
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DOCUMENT: 3650H-02DSR
ELECTRICAL SPECIFICATION
SSD-HXXX(I)-3650 DATA SHEET
DC CHARACTERISTICS
Table 11: DC Characteristics
5V ±10%
Minimum Maximum
Symbol Parameter
Units
V
Power Supply Voltage
4.5
5.5
5
V
CC
I
I
Input Leakage *(1) Current
Output Leakage *(1) Current
-
μA
μA
mA
mA
mA
V
LI
LO
-
5
V
V
V
V
V
V
V
V
V
V
Read Current
Write Current
Standby Current
-
80
CCR
CCW
CCS
IL
CC
CC
CC
-
80
-
0.5
0.3 x V
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
-0.3
CC
7 x Vcc
-
V
+ 0.3
CC
V
IH
0.4
-
V
OL
V
- 0.4
V
OH
CC
*(1) Except the pulled-up/pulled-down pin.
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SSD-HXXX(I)-3650 DATA SHEET
ELECTRICAL SPECIFICATION
AC CHARACTERISTICS
I/O Access Read Timing
A[10::0]
tGHAX
tRLIGL
____
REG
tRHIGH
tCLIGL
tCHIGH
__
CE
tIGLIGH
___
IORD
tIGHINH
tAVIGL
______
INPACK
tIGLINL
tAXISH
______
IOIS16
tAVISL
tIGHQX
tDVRL
D[15::0]
Figure 4: I/O Access Read Timing Diagram
Table 12: I/O Access Read Timing
Symbol Parameter
Minimum
Maximum Units
t
t
t
t
t
t
t
t
t
t
t
t
t
Data Delay after IORD
-
50
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DVRL
Data Hold following IORD
IORD Pulse Width
5
IGHQX
IGLIGH
AVIGL
GHAX
CLIGL
CHIGH
RLIGL
RHIGH
IGLINL
IGHINH
AVISL
65
25
10
5
-
Address Setup before IORD
Address Hold following IORD
CE Setup before IORD
-
-
-
CE Hold following IORD
10
5
-
REG Setup before IORD
-
REG Hold following IORD
INPACK Delay falling from IORD
INPACK Delay Rising from IORD
IOIS16 Delay Falling from Address
IOIS16 Delay Rising from Address
0
-
-
(1)
(1)
(1)
(1)
-
-
-
AXISH
Note: (1) IOIS16 and INPACK are not supported.
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DOCUMENT: 3650H-02DSR
ELECTRICAL SPECIFICATION
SSD-HXXX(I)-3650 DATA SHEET
I/O Access Write Timing
A[10::0]
tAXIGH
tRHIGH
tRLIGL
____
REG
tCHIGH
tCLIGL
__
CE
tIGLIGH
_____
IOWR
tAVIGL
tAXISH
______
IOIS16
tAVISL
tIGHQX
tIGHDX
D[15::0]
Figure 5: I/O Access Write Timing Diagram
Table 13: I/O Access Write Timing
Symbol
Parameter
Data Hold following IOWR
Minimum
Maximum Units
t
t
t
t
t
t
t
t
t
t
t
5
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
IGHDX
IGHQX
IGLIGH
AVIGL
AXIGH
CLIGL
CHIGH
RLIGL
RHIGH
AVISL
Data Setup before IOWR
IOWR Pulse Width
20
65
25
10
5
-
-
Address Setup before IOWR
Address Hold following IOWR
CE Setup before IOWR
-
-
-
CE Hold following IOWR
10
5
-
REG Setup before IOWR
REG Hold following IOWR
IOIS16 Delay Falling from Address
IOIS16 Delay Rising from Address
-
0
-
-
(1)
(1)
-
AXISH
Note: (1) IOIS16 and INPACK are not supported.
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SSD-HXXX(I)-3650 DATA SHEET
ELECTRICAL SPECIFICATION
True IDE Read/Write Access Timing
tICL
ADDRESS Valid
CS0, CS1, DA[2::0]
tAX16H
tAVRWL
tAXRWH
tRWPW
____ _____
DIOR,DIOW
tDVWL
WRITE
DD[15::00]
tDXWH
READ
DD[15::00]
tDVRL
tIOPW
tDXRH
tIOST
IORDY
______
IOIS16
tAV16L
Figure 6: True IDE Read/Write Access Timing Diagram
Table 14: True IDE Read/Write Access Timing
Symbol Parameter
Minimum Maximum Units
t
t
t
t
t
t
t
t
t
t
t
t
Cycle Time
Address Valid to DIOR,DIOW Setup Time 15
100
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ICL
-
AVRWL
RWPW
DVWL
DXWH
DVRL
DXRH
AV16L
AX16H
AXRWH
IOST
DIOR, DIOW Pulse Width
DIOW Data Setup Time
65
20
5
-
-
DIOW Data Hold Time
-
DIOR Data Setup Time
15
5
-
DIOR Data Hold Time
-
Address Valid to IOCS16 Assertion
Address Valid to IOCS16 Negation
DIOW,DIOR to Address Valid Hold Time
IORDY Setup Time
-
(1)
(1)
-
-
10
-
(1)
(1)
IORDY Pulse Width
-
IOPW
Note: (1) IOIS16 and INPACK are not supported.
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DOCUMENT: 3650H-02DSR
ELECTRICAL SPECIFICATION
SSD-HXXX(I)-3650 DATA SHEET
True IDE Multiword DMA Read/Write Access Timing
This function does not apply to SiliconDrives that have DMA disabled.
Figure 7: True IDE Multiword DMA Read/Write Access Timing
Table 15: True IDE Multiword DMA Read/Write Access Timing
Symbol Parameter
Minimum
Maximum Units
t
t
t
t
t
t
t
t
t
t
t
t
Cycle Time (mode 2)
100
65
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
RWC
RWPW
RDA
DIOR/DIOW Pulse Width
DIOR Data Access
-
50
-
DIOR/DIOW Data Setup Time
DIOW Data Hold Time
15
5
RWSU
WH
-
DIOR Data Hold Time
5
-
RH
DMACK to DIOR/DIOW Setup Time
DIOR/DIOW to DMACK Hold Time
DIOR/DIOW negated Pulse Width
DIOR/DIOW to DMARQ Delay
CS(1:0) valid to DIOR/DIOW
CS(1:0) Hold Time
0
-
DMRW
RWDH
RWN
RWD
CSRW
CSH
5
-
25
-
-
35
-
10
10
-
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SSD-HXXX(I)-3650 DATA SHEET
ATA AND TRUE IDE REGISTER DECODING
ATA AND TRUE IDE REGISTER DECODING
SiliconDrive can be configured as either a a memory-mapped or an an I/O
devices. As noted earlier, communication to and from the drive is
accomplished using the ATA Command Block.
TASK FILE REGISTER SPECIFICATION
The Task File registers are used for reading and writing the storage data in the
SiliconDrive. The decoded addresses are as shown in the following table.
Table 16: Task File Register Specification
CS0# CS1# DA02 DA01 DA00 DIOR# = L
DIOW# = L
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
1
1
1
1
X
X
0
1
1
1
0
0
1
1
0
0
1
1
X
X
X
0
1
1
0
1
0
1
0
1
0
1
X
X
X
X
0
1
Data
Data
Error
Feature
Sector Count
Sector Count
Sector Number Sector Number
Cylinder Low
Cylinder High
Drive/Head
Status
Cylinder Low
Cylinder High
Drive/Head
Command
Invalid
Invalid
High-Z
Not Used
High-Z
Not Used
High-Z
Not Used
Alternate Status Device Control
Device Address Not Used
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DOCUMENT: 3650H-02DSR
ATA REGISTERS
SSD-HXXX(I)-3650 DATA SHEET
ATA REGISTERS
DATA REGISTER
The Data register is a 16-bit register used to transfer data blocks between the
host and drive buffers. The register may set to 8-bit mode by using the Set
ERROR REGISTER
The Error register contains the error status, if any, generated from the last
executed ATA command. The contents are qualified by the ERR bit being set
Table 17: Error Register
D
D
D
D
D
D
D
D
0
Operation
7
6
5
4
3
2
1
Read
BBK UNC
MC
0
IDNF MCR ABRT TKNOF AMNF
Default
Value
0
0
0
0
0
0
0
Bit(s) Description
7
6
Bad Block Detected (BBK). Set when a bad block is detected.
Uncorrectable Data Error (UNC). Set when an uncorrectable error
is encountered.
5
4
3
2
Media Changed (MC). Set to 0.
ID Not Found (IDNF). Set when the sector ID is not found.
MCR (Media Change Request). Set to 0.
Aborted Command (ABRT). Set when a command is aborted due
to a drive error.
1
0
Track 0 Not Found (TKONF). Set when the executive drive
diagnostic command is executed.
Address Mark Not Found (AMNF). Set in the case of a general
error.
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SSD-HXXX(I)-3650 DATA SHEET
FEATURE REGISTER
ATA REGISTERS
The Feature register is command-specific and used to enable and disable
interface features. This register supports only either odd or even byte data
transfers.
Table 18: Feature Register
Operation
D
D
D
D
D
D
D
D
0
7
6
5
4
3
2
1
Read/Write
Feature Byte
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DOCUMENT: 3650H-02DSR
ATA REGISTERS
SSD-HXXX(I)-3650 DATA SHEET
SECTOR COUNT REGISTER
The Sector Count register is used to read or write the sector count of the data
for which an ATA transfer has been made.
Table 19: Sector Count Register
D
D
D
D
D
D
D
1
Operation
D
7
6
5
4
3
2
0
Read/Write
Default Value
Sector Count
0
0
0
0
0
0
0
1
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SSD-HXXX(I)-3650 DATA SHEET
SECTOR NUMBER REGISTER
ATA REGISTERS
The Sector Number register is set by the host to specify the starting sector
number associated with the next ATA command to be executed. Following a
qualified ATA command sequence, the device sets the register value to the last
sector read or written as a result of the previous AT command.
When Logical Block Addressing (LBA) mode is implemented and the host
issues a command, the contents of the register describe the Logical Block
Number bits A[7:0]. Following an ATA command, the device loads the register
with the LBA block number resulting from the last ATA command.
Table 20: Sector Number Register
D
D
D
D
D
D
D
1
Operation
D
7
6
5
4
3
2
0
Read/Write
Sector Number (CHS Addressing)
Logical Block Number bits A07-A00 (LBA Addressing)
Default Value
0
0
0
0
0
0
0
1
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DOCUMENT: 3650H-02DSR
ATA REGISTERS
SSD-HXXX(I)-3650 DATA SHEET
CYLINDER LOW REGISTER
The Cylinder Low register is set by the host to specify the cylinder number low
byte. Following an ATA command, the content of the register is written by the
device, identifying the cylinder number low byte.
In LBA mode, the 8-bit register maintains the contents of the Logical Block
number address bits A15:A08.
Table 21: Cylinder Low Register
D
D
D
D
D
D
D
1
Operation
D
7
6
5
4
3
2
0
Read/Write
Cylinder Number Low Byte (CHS Addressing)
Logical Block Number bits A15-A08 (LBA Addressing)
Default Value
0
0
0
0
0
0
0
0
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SSD-HXXX(I)-3650 DATA SHEET
CYLINDER HIGH REGISTER
ATA REGISTERS
The Cylinder High register is set by the host to specify the cylinder number
high byte. Following an ATA command, the content of the register is set
internally by the device, identifying the cylinder number high byte.
In LBA mode, the 8-bit register maintains the contents of the Logical Block
number address bits A23:A16.
Table 22: Cylinder High Register
D
D
D
D
D
D
D
1
Operation
D
7
6
5
4
3
2
0
Read/Write
Cylinder Number Low Byte (CHS Addressing)
Logical Block Number bits A23-A16 (LBA Addressing)
Default Value
0
0
0
0
0
0
0
0
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DOCUMENT: 3650H-02DSR
ATA REGISTERS
SSD-HXXX(I)-3650 DATA SHEET
DRIVE/HEAD REGISTER
The Drive/Head register is used by the host and the device to select the type
of addressing (CHS or LBA), the drive letter, and either bits 3-0 of the head
number in CHS mode or logical block number bits 27-24 in LBA mode.
Table 23: Drive/Head Register
Operation
D
D
D
D
D
D
D
D
0
7
6
5
4
3
2
1
Read/Write
1
LBA
1
DRV
HS3
HS2
HS1
HS0
LBA24
LBA27 LBA26 LBA25
Default
Value
1
0
1
0
0
0
0
0
The Drive/Head register is used by the host to specify one of a pair of ATA
drives present in the platform.
Bit(s)
Description
6
4
LBA. Selects between CHS (0) and LBA (1) addressing mode.
Drive Address (DRV). Indicates the drive number selected by the
host, either 0 or 1.
3-0
HS3 to 0. Indicates bits 3-0 of the head number in CHS addressing
mode or LBA bits 27-24 in LBA mode.
• CHS to LBA conversion: LBA = (C x HpC + H) x SpH + S -1
• LBA to CHS conversion:
¶ C = LBA/(HpC x SpH)
¶ H = (LBA/SpH) mod (HpC)
¶ S = (LBA mod(SpH)) + 1
...where:
¶ C is the cylinder number
¶ H is the head number
¶ S is the sector count
¶ HpC is the head count per cylinder count
¶ SpH is the sector count per head count (track)
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SSD-HXXX(I)-3650 DATA SHEET
STATUS REGISTER
ATA REGISTERS
The Status register provides the device’s current status to the host. The status
register is an 8-bit read-only register. When the contents of the register are
read by the host, the IREQ# bit is cleared.
Table 24: Status Register
D
D
D
D
D
D
D
D
0
Operation
7
6
5
4
3
2
1
Read/Write
Default Value
BSY DRDY DWF DSC DRQ CORR IDX ERR
0
0
0
0
0
0
0
0
Bit(s) Description
7
Busy (BSY). Set when the drive is busy and unable to process any
new ATA commands.
6
Data Ready (DRDY). Set when the device is ready to accept ATA
commands from the host.
5
4
Drive Write Fault (DWF). Always set to 0.
Drive Seek Complete (DSC). Set when the drive heads have been
positioned over a specific track.
3
Data Request (DRQ). Set when a device is ready to transfer a word
or byte of data to or from the host and the device.
2
1
0
Corrected Data (CORR). Always set to 0.
Index (IDX). Always set to 0.
Error (ERR). Set when an error occurs during the previous ATA
command.
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DOCUMENT: 3650H-02DSR
ATA REGISTERS
SSD-HXXX(I)-3650 DATA SHEET
COMMAND REGISTER
The Command register specifies the ATA command code being issued to the
drive by the host. Execution of the command begins immediately following the
issuance of the command register code by the host.
Table 25: Command Register
D
D
D
D
D
D
D
D
0
Operation
7
6
5
4
3
2
1
Read/Write
ATA Command Code
supported ATA commands.
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SSD-HXXX(I)-3650 DATA SHEET
ALTERNATE STATUS REGISTER
ATA REGISTERS
The Alternate Status register is a read-only register indicating the status of the
device, following the previous ATA command. See "Status Register" on page
22 for specific details.
Table 26: Alternate Status Register
D
D
D
D
D
D
D
D
0
Operation
7
6
5
4
3
2
1
Read/Write
Default Value
BSY DRDY DWF DSC DRQ CORR IDX ERR
0
0
0
0
0
0
0
0
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DOCUMENT: 3650H-02DSR
ATA REGISTERS
SSD-HXXX(I)-3650 DATA SHEET
DEVICE CONTROL REGISTER
The Device Control register is used to control the interrupt request and issue
ATA software resets.
Table 27: Device Control Register
D
D
D
D
D
D
D
D
0
Operation
7
6
5
4
3
2
1
Write
-
-
-
-
1
SRST nIEN
0
Bit(s)
Description
7-4
3
Reserved bits.
Always set to 1.
Software Reset (SRST). When set, resets the ATA software.
2
1
Interrupt Enable (nIEN). When set, device interrupts are disabled.
There is no function in the memory-mapped mode.
0
Always set to 0.
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SSD-HXXX(I)-3650 DATA SHEET
DEVICE ADDRESS REGISTER
ATA REGISTERS
The Device Address register is used to maintain compatibility with ATA disk
drive interfaces.
Table 28: Device Address Register
D
D
D
D
D
D
D
D
0
Operation
7
6
5
4
3
2
1
Read/Write
Default Value
-
nWTG nHS3 nHS2 nHS1 nHS0 nDS1 nDS0
0
0
1
1
1
1
1
0
Bit(s) Description
7
Reserved bit.
6
Write Gate (nWTG). Low when a write to the device is in process.
5-2
nHS3 to nHS0. The negated binary address of the currently selected
head.
1
0
nDS1. Low when drive 1 is selected and active.
nDS0. Low when drive 0 is selected and active.
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
ATA COMMAND BLOCK AND SET DESCRIPTION
In accordance with the ANSI ATA Specification, the device implements seven
registers that are used to transfer instructions to the device by the host. These
commands follow the ANSI standard ATA protocol. A description of the ATA
command block is provided in the following table.
Table 29: ATA Command Block and Set Description
D
D
D
D
D
D
D
D
0
Operation
7
6
5
4
3
2
1
Feature
X
X
X
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
1
LBA
1
Drive
X
X
ATA COMMAND SET
Table 30: ATA Command Set
Registers Used
FR SC SN CY DH LBA
Command
Code
Class Command Name
1
1
Check Power Mode
98h, E5h
90h
-
-
-
-
-
-
-
-
D
D
-
-
Execute Drive
Diagnostics
1
2
1
1
1
1
Erase Sector
Format Track
Identify Drive
Idle
C0h
-
-
-
-
-
-
Y
Y
-
Y
-
Y
Y
-
Y
Y
D
D
D
Y
Y
Y
-
50h
ECh
-
97h, E3h
95h, E1h
91h
Y
-
-
-
Idle Immediate
-
-
-
Initialize Drive
Parameters
Y
-
-
-
1
1
1
Read Buffer
Read DMA*
Read Multiple
E4h
C8h
C4h
-
-
-
-
-
-
D
Y
Y
-
Y
Y
Y
Y
Y
Y
Y
Y
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SSD-HXXX(I)-3650 DATA SHEET
Class Command Name
ATA COMMAND BLOCK AND SET DESCRIPTION
Table 30: ATA Command Set (Continued)
Registers Used
Command
Code
FR SC SN CY DH LBA
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
2
3
3
Read Long Sector
Read Sector(s)
22h, 23h
20h, 21h
-
-
-
-
-
-
Y
-
-
-
-
-
-
-
-
-
-
-
-
Y
Y
Y
-
Y
Y
Y
-
Y
Y
Y
Y
D
Y
D
D
D
D
D
Y
Y
D
Y
Y
Y
Y
Y
Y
Y
-
-
Read Verify Sector(s) 40h, 41h
Y
-
Recalibrate
1Xh
Request Sense
Seek
03h
-
-
-
-
7Xh
-
Y
-
Y
-
Y
-
Set Features
Set Multiple Mode
Set Sleep Mode
Standby
EFh
C6h
Y
-
-
-
-
99h, E6h
96h, E2h
94h, E0h
87h
-
-
-
-
-
-
-
Standby Immediate
Translate Sector
Wear Level
-
-
-
-
Y
-
Y
-
Y
-
Y
-
F5h
Write Buffer
E8h
-
-
-
-
Write DMA*
CAh
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Write Long Sector
Write Multiple
32h, 33h
C5h
Y
Y
Write Multiple w/o
Erase
CDh
2
2
Write Sector(s)
30h, 31h
38h
-
-
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Write Sector(s) w/o
Erase
3
Write Verify
3Ch
-
Y
Y
Y
Y
Y
* = This function does not apply to SiliconDrives that have DMA disabled.
Notes:
• CY = Cylinder
• SC = Sector Count
• DH = Drive/Head
• SN = Sector Number
• FR = Feature LBA — LBA bit of the Drive/Head register (D denotes that only
the drive bit is used)
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Check Power Mode — 98h, E5h
The Check Power Mode command verifies the device’s current power mode.
When the device is configured for standby mode or is entering or exiting
standby, the BSY bit is set, the Sector Count register set to 00h, and the BSY
bit is cleared. In idle mode, BSY is set and the Sector Count register is set to
FFh. The BSY bit is then cleared and an interrupt is issued.
Table 31: Check Power Mode — 98h, E5h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
X
X
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
X
X
X
Drive
98h or E5h
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ATA COMMAND BLOCK AND SET DESCRIPTION
Executive Drive Diagnostic — 90h
The Executive Drive Diagnostic performs an internal read write diagnostic test
using (AA55h and 55AAh). If an error is detected in the read/write buffer, the
Error register reports the appropriate diagnostic code.
Table 32: Executive Drive Diagnostic — 90h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
X
X
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
X
X
X
Drive
90h
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Format Track — 50h
The Format Track command formats the common solid-state memory array.
Table 33: Format Track — 50h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
1
LBA
1
Drive Head Number (LBA27-24)
50h
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SSD-HXXX(I)-3650 DATA SHEET
Identify Drive — ECh
ATA COMMAND BLOCK AND SET DESCRIPTION
Issued by the host, the Identify Drive command provides 256 bytes of drive
attribute data (i.e., sector size, count, and so on) The identify drive data
structure is detailed in the following table.
Table 34: Identify Drive — ECh
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
X
X
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
X
X
X
Drive
ECh
X
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Identify Drive — Drive Attribute Data
Table 35: Identify Drive — Drive Attribute Data
Data Default Bytes Data Description
Word
Address
0
045Ah
2
General configuration bit information
• 15: Non-magnetic disk
• 14: Formatting speed latency
permissible gap needed
• 13: Track Offset option supported
• 12: Data Strobe Offset option supported
• 11: Over 0.5% rotational speed
difference
• 10: Disk transfer rate >10Mbps
• 9: 10Mbps >= disk transfer rate >5Mbps
• 8: 5Mbps >= disk transfer rate
• 7: Removable cartridge drive
• 6: Fixed drive
• 5: Spindle Motor Control option
executed
• 4: Over 15μs changing head time
• 3: Non-MFM encoding
• 2: Soft sector allocation
• 1: Hard sector allocation
• 0: Reserved
1
XXXXh
0000h
00XXh
0000h
XXXXh
XXXXh
XXXXh
0000h
XXXXh
2
Number of cylinders
2
2
Reserved
3
2
Number of heads
4
2
Number of unformatted bytes per track
Number of unformatted bytes per sector
Number of sectors per track
Number of sectors per device
Reserved
5
2
6
2
7-8
9
4
2
10-19
20
Serial number
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PAGE 33
SSD-HXXX(I)-3650 DATA SHEET
ATA COMMAND BLOCK AND SET DESCRIPTION
Table 35: Identify Drive — Drive Attribute Data (Continued)
Word
Address
Data Default Bytes Data Description
20
0001h
2
Buffer type
• 0000h: Not specified
• 0001h: A single-ported, single-sector
buffer
• 0002h: A dual-ported multisector buffer
• 0003h: A dual-ported multisector buffer
with a read caching
21
22
0001h
0004h
2
2
Buffer size in 512-byte increments
Number of ECC bytes passed on read/
write long commands
23-26
27-46
47
XXXXh
XXXXh
0001h
8
Firmware revision (eight ASCII characters)
Model number (40 ASCII characters)
40
2
7-0: Maximum number of sectors that can
be transferred with a Read/Write Multiple
command per interrupt
48
49
0000h
0f00h
2
2
Double word (32 bit) not supported
• 11: IORDY supported
• 9: LBA supported
• 8: DMA supported
50
51
52
53
0000h
0200h
0000h
0003h
2
2
2
2
Reserved
15-8: PIO data transfer cycle timing
15-8: DMA data transfer cycle timing
• 1: Words 64-70 are valid
• 0: Words 54-58 are valid
54
XXXXh
XXXXh
XXXXh
XXXXh
010Xh
2
2
2
4
2
Current number of cylinders
Current number of heads
Current sectors per track
Current capacity in sectors
55
56
57-58
59
7-0: Current sectors can be transferred
with a Read/Write Multiple command per
interrupt
60-61
62
XXXXh
0000h
4
2
Total number of sectors addressable in
LBA mode
Single-word DMA modes supported
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Idle — 97h, E3h
When issued by the host, the device’s internal controller sets the BSY bit,
enters the Idle mode, clears the BSY bit, and generates an interrupt. If the
sector count is non-zero, it is interpreted as a timer count with each count
being 5ms, and the automatic power-down mode is enabled. If the sector
count is zero, the automatic power-down mode is disabled.
Table 36: Idle — 97h, E3h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Timer Count (5ms increments)
X
X
X
X
X
X
Drive
X
97h or E3h
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SSD-HXXX(I)-3650 DATA SHEET
Idle Immediate — 95h, E1h
ATA COMMAND BLOCK AND SET DESCRIPTION
When issued by the host, the device’s internal controller sets the BSY bit,
enters Idle Mode, clears the BSY bit, and issues an interrupt. The interrupt is
issued whether or not the Idle mode is fully entered.
Table 37: Idle Immediate — 95h, E1h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
X
X
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
X
X
X
Drive
95h or E1h
X
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Initialize Drive Parameters — 91h
Initialize Drive Parameters allows the host to set the sector counts per track
and the head counts per cylinder to 1 Fixed. Upon issuance of the command,
the device sets the BSY bit and associated parameters, clears the BSY bit,
and issues an interrupt.
Table 38: Initialize Drive Parameters — 91h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Sector Count (Number of Sectors)
X
X
X
X
0
X
Drive
Head Number
(Number of Heads — 1)
Command
91h
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SSD-HXXX(I)-3650 DATA SHEET
Recalibrate — 1Xh
ATA COMMAND BLOCK AND SET DESCRIPTION
The Recalibrate command sets the cylinder low and high, head number to 0h,
and sector number to 1h in CHS mode. In LBA mode (i.e., LBA = 1), the sector
number is set to 0h.
Table 39: Recalibrate — 1Xh
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
X
X
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
1
LBA
1
Drive
1Xh
X
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Read Buffer — E4h
The Read Buffer command allows the host to read the contents of the sector
buffer. When issued, the device sets the BSY bit and sets up the sector buffer
data in preparation for the read operation. When the data is ready, the DRQ bit
is set and the BSY bit in the Status register are set and cleared, respectively.
Table 40: Read Buffer — E4h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
X
X
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
X
X
X
Drive
E4h
X
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SSD-HXXX(I)-3650 DATA SHEET
Read DMA — C8h
ATA COMMAND BLOCK AND SET DESCRIPTION
The Read DMA command allows the host to read data using the DMA transfer
protocol.
Note: This function does not apply to SiliconDrives that have DMA
disabled.
Table 41: Read DMA — C8h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
1
LBA
1
Drive Head Number (LBA27-24)
C8h
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Read Multiple — C4h
The Read Multiple command executes similarly to the Read Sector command,
with the exception that interrupts are issued only when a block containing the
counts of sectors defined by the Set Multiple command is transferred.
Table 42: Read Multiple — C4h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
1
LBA
1
Drive Head Number (LBA27-24)
C4h
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SSD-HXXX(I)-3650 DATA SHEET
Read Sector — 20h, 21h
ATA COMMAND BLOCK AND SET DESCRIPTION
The Read Sector command allows the host to read sectors 1 to 256 as
specified in the Sector Count register. If the sector count is set to 0h, all 256
sectors of data are made available. When the command code is issued and
the first sector of data has been transferred to the buffer, the DRQ bit is set.
The Read Sector command is terminated by writing the cylinder, head, and
sector number of the last sector read in the task file. On error, the read
operation is aborted in the errant sector.
Table 43: Read Sector — 20h, 21h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
1
LBA
1
Drive Head Number (LBA27-24)
20h or 21h
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Read Long Sector(s) — 22h, 23h
The Read Long Sector(s) command operates similarly to the Read Sector(s)
command, with the exception that it transfers requested data sectors and ECC
data. The long instruction ECC byte transfer for Long commands is a byte
transfer at a fixed length of 4 bytes.
Table 44: Read Long Sector(s) — 22h, 23h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
1
LBA
1
Drive Head Number (LBA27-24)
22h or 23h
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SSD-HXXX(I)-3650 DATA SHEET
ATA COMMAND BLOCK AND SET DESCRIPTION
Read Verify Sector(s) — 40h, 41h
The Read Verify Sector(s) command operates similarly to the Read Sector(s)
command, with the exception that is does not set the DRQ bit and does not
transfer data to the host. When the requested sectors are verified, the onboard
controller clears the BSY bit and issues an interrupt.
Table 45: Read Verify Sector(s) — 40h, 41h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
1
LBA
1
Drive Head Number (LBA27-24)
40h or 41h
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Seek — 7Xh
The Seek command seeks and picks up the head to the tracks specified in the
task file. When the command is issued, the solid-state memory chips do not
need to be formatted. After an appropriate amount of time, the DSC bit is set.
Table 46: Seek — 7Xh
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
1
LBA
1
Drive Head Number (LBA27-24)
7Xh
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SSD-HXXX(I)-3650 DATA SHEET
Set Features — EFh
ATA COMMAND BLOCK AND SET DESCRIPTION
The Set Features command allows the host to configure the feature set of the
Table 47: Set Features — EFh
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
Feature
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
X
X
X
X
X
X
X
Drive
EFh
X
Table 48: Set Features’ Attributes
Operation
Enable 8-bit data transfer
Feature
01h
66h
81h
BBh
CCh
Disable reverting to power on defaults
Disable 8-bit data transfer
4 bytes of data apply on Read/Write Long commands
Enable revert to power on defaults
On power-up or following a hardware reset, the device is set to the default
mode 81h.
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Set Multiple Mode — C6h
The Set Multiple Mode command allows the host to access the drive via Read
Multiple and Write Multiple ATA commands. Additionally, the command sets
the block count (i.e., the number of sectors within the block) for the Read/Write
Multiple command. The sector count per block is set in the Sector Count
register.
Table 49: Set Multiple Mode — C6h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
X
X
X
X
X
X
Drive
C6h
X
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SSD-HXXX(I)-3650 DATA SHEET
ATA COMMAND BLOCK AND SET DESCRIPTION
Set Sleep Mode — 99h, E6h
The Set Sleep Mode command allows the host to set the device in sleep
mode. When the onboard controller transitions to sleep mode, it clears the
BSY bit and issues an interrupt. The device interface then becomes inactive.
Sleep mode can be exited by issuing either a hardware or software reset.
Table 50: Set Sleep Mode — 99h, E6h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
X
X
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
X
X
X
Drive
99h or E6h
X
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Standby — 96h, E2h
When the Standby command is issued by the host, it transitions the device into
standby mode. If the Sector Count register is set to a value other than 0h, the
Auto Powerdown function is enabled and the device returns to Idle mode.
Table 51: Standby — 96h, E2h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Timer Count (5ms x Timer Count)
X
X
X
X
X
X
Drive
X
96h or E2h
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SSD-HXXX(I)-3650 DATA SHEET
ATA COMMAND BLOCK AND SET DESCRIPTION
Standby Immediate — 94h, E0h
When the Standby Immediate command is issued by the host, it transitions the
device into standby mode.
Table 52: Standby Immediate — 94h, E0h
D
D
D
D
D
D
D
D
7
Register
7
6
5
4
3
2
1
Feature
X
X
X
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
X
X
X
Drive
94h or E0h
X
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Write Buffer — E8h
The Write Buffer command allows the host to rewrite the contents of the
512- byte data buffer with the wanted data.
Table 53: Write Buffer — E8h
D
D
D
D
D
D
D
D
7
Register
7
6
5
4
3
2
1
Feature
X
X
X
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
X
X
X
Drive
E8h
X
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SSD-HXXX(I)-3650 DATA SHEET
Write DMA — CAh
ATA COMMAND BLOCK AND SET DESCRIPTION
The Write DMA command allows the host to write data using the DMA transfer
protocol.
Note: This function does not apply to SiliconDrives that have DMA
disabled.
Table 54: Write DMA — CAh
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low(LBA15-8)
Cylinder High(LBA23-16)
X
LBA
X
Drive Head Number(LBA27-24)
CAh
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Write Multiple — C5h
The Write Multiple command operates in the same manner as the Write Sector
command. When issued, the device sets the BSY bit within 400ns and
generates an interrupt at the completion of a transferred block of sectors. The
DRQ bit is set at the beginning of a block transfer.
Table 55: Write Multiple — C5h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low(LBA15-8)
Cylinder High(LBA23-16)
X
LBA
X
Drive Head Number(LBA27-24)
C5h
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SSD-HXXX(I)-3650 DATA SHEET
ATA COMMAND BLOCK AND SET DESCRIPTION
Write Sector(s) — 30h, 31h
The Write Sector(s) command writes from 1 to 256 sectors as specified in the
Sector Count register. A sector count of 0 requests 256 sectors. When issued,
the device sets the BSY bit within 400ns and generates an interrupt at the
completion of a transferred block of sectors. The DRQ bit is set at the
beginning of a block transfer.
Table 56: Write Sector(s) — 30h, 31h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
X
LBA
X
Drive Head Number (LBA27-24)
30h or 31h
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Write Long Sector(s) — 32h, 33h
The Write Long Sector(s) command operates in the same manner as the Write
Sector command — when issued, the device sets the BSY bit within 400ns
and generates an interrupt at the completion of a transferred block of sectors.
The DRQ bit is set at the beginning of a block transfer.
Table 57: Write Long Sector(s) — 32h, 33h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
X
LBA
X
Drive Head Number (LBA27-24)
32h or 33h
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SSD-HXXX(I)-3650 DATA SHEET
Erase Sector(s) — C0h
ATA COMMAND BLOCK AND SET DESCRIPTION
The Erase Sector(s) command is issued prior to the issuance of a Write
Sector(s) or Write Multiple w/o Erase command.
Table 58: Erase Sector(s) — C0h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
X
LBA
X
Drive Head Number (LBA27-24)
C0h
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Request Sense — 03h
The Request Sense command identifies the extended error codes generated
by the preceding ATA command. The Request Sense command must be
issued immediately following the detection of an error via the Error register.
Table 59: Request Sense — 03h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
X
X
X
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
1
X
1
Drive
03h
X
The extended error codes are defined in the following table.
Table 60: Extended Error Codes
Extended Error Codes
Description
00h
No error detected
01h
Self test is OK (no error)
Miscellaneous error
Invalid command
09h
20h
21h
Invalid address (requested head or sector invalid)
Address overflow (address too large)
Supply or generated voltage out of tolerance
Uncorrectable ECC error
2Fh
35h, 36h
11h
18h
Corrected ECC error
05h, 30h-32h, 37h,3Eh
Self test of diagnostic failed
10h, 14h
3Ah
ID not found
Spare sectors exhausted
1Fh
Data transfer error/aborted command
0Ch, 38h, 3Bh, 3Ch, 3Fh Computed media format
03h
Write/erase failed
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SSD-HXXX(I)-3650 DATA SHEET
Translate Sector — 87h
ATA COMMAND BLOCK AND SET DESCRIPTION
The Translate Sector command is not currently supported by the
SiliconSystems’ SiliconDrive. If the host issues this command, the device
responds with 0x00h in the data register.
Table 61: Translate Sector — 87h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
1
LBA
1
Drive Head Number (LBA27-24)
87h
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Wear-Level — F5h
The Wear-Level command is supported as an NOP command for the
purposes of backward compatibility with the ANSI AT attachment standard.
This command sets the Sector Count register to 0x00h.
Table 62: Wear-Level — F5h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Completion Status
X
X
X
X
X
X
Drive
F5h
Flag
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SSD-HXXX(I)-3650 DATA SHEET
ATA COMMAND BLOCK AND SET DESCRIPTION
Write Multiple w/o Erase — CDh
The Write Multiple w/o Erase command functions identically to the Write
Multiple command, with the exception that the implied pre-erase (i.e., Erase
Sector(s) command) is not issued prior to writing the sectors.
Table 63: Write Multiple w/o Erase — CDh
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
X
LBA
X
Drive Head Number (LBA27-24)
CDh
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DOCUMENT: 3650H-02DSR
ATA COMMAND BLOCK AND SET DESCRIPTION
SSD-HXXX(I)-3650 DATA SHEET
Write Sector(s) w/o Erase — 38h
The Write Sector(s) w/o Erase command functions similar to the Write Sector
command, with the exception that the implied pre-erase (i.e., Erase Sector(s)
command) is not issued prior to writing the sectors.
Table 64: Write Sector(s) w/o Erase — 38h
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
X
LBA
X
Drive Head Number (LBA27-24)
38h
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SSD-HXXX(I)-3650 DATA SHEET
Write Verify — 3Ch
ATA COMMAND BLOCK AND SET DESCRIPTION
The Write Verify command verifies each sector immediately after it is written.
This command performs identically to the Write Sector(s) command, with the
added feature of verifying each sector written.
Table 65: Write Verify — 3Ch
D
D
D
D
D
D
D
D
0
Register
7
6
5
4
3
2
1
Feature
X
Sector Count
Sector Number
Cylinder Low
Cylinder High
Drive Head
Command
Sector Count
Sector Number (LBA7-0)
Cylinder Low (LBA15-8)
Cylinder High (LBA23-16)
X
LBA
X
Drive Head Number (LBA27-24)
3Ch
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DOCUMENT: 3650H-02DSR
SALES AND SUPPORT
SSD-HXXX(I)-3650 DATA SHEET
SALES AND SUPPORT
To order or obtain information on pricing and delivery, contact your
SiliconSystems Sales Representative.
PART NUMBERING
NOMENCLATURE
The following table defines the SiliconDrive 1.8" Drive part numbering scheme.
Table 66: Part Numbering Nomenclature
SSD-
H
YYY
T
-3650
Part number suffix —
contact your
SiliconSystems’ Sales
Representative
Temperature Range:
•
•
Blank = Commercial
I = Industrial
Capacity: 32M = 32MB to 16G = 16GB
Form Factor:
•
•
C = CF
D = 2.5" Drive
•
•
•
H = 1.8" Drive
M = Module
P = PC Card
SiliconSystems’ SiliconDrive
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SSD-HXXX(I)-3650 DATA SHEET
PART NUMBERS
PART NUMBERING
The following table lists the SiliconDrive’s part numbers.
Table 67: Part Numbers
Part Number
Capacity
SSD-H16G(I)-3650
SSD-H08G(I)-3650
SSD-H04G(I)-3650
SSD-H02G(I)-3650
SSD-H01G(I)-3650
SSD-H51M(I)-3650
SSD-H25M(I)-3650
SSD-H12M(I)-3650
SSD-H64M(I)-3650
SSD-H32M(I)-3650
16GB
8GB
4GB
2GB
1GB
512MB
256MB
128MB
64MB
32MB
ROHS 6 OF 6 PRODUCT LABELING — PB-FREE IDENTIFICATION LABEL
The Pb-free identification label indicates that the enclosed components/
devices and/or assemblies do not contain any lead (i.e., they are lead-free, as
defined in RoHS directive 2002/95/ED). The above symbol is on all RoHS 6 of
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DOCUMENT: 3650H-02DSR
RELATED DOCUMENTATION
SSD-HXXX(I)-3650 DATA SHEET
SAMPLE LABEL
Standard Back Label with Lot
Code Information
Front Label
SiliconSystems, Inc.
SiliconDrive
16GB
0025/3650
16GB
SSD-H16G(I)-3650
Figure 8: Sample Label
RELATED DOCUMENTATION
SiliconSystems Sales Representative.
Table 68: Related Documentation
SiliconDrive
Application-SpecificDescription
Technology
Document Number
PowerArmor
SiProtect
Eliminates drive corruption
SSWPxx-PowerArmor-R
SSANxx-SilDrvSec-R
Protection software for
password-required, read/write,
or read-only access.
SiSweep
SiPurge
Ultra-fast data erasure
SSANxx-SilDrvSec-R
Non-recoverable data erasure SSANxx-SilDrvSec-R
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SSD-HXXX(I)-3650 DATA SHEET
RELATED DOCUMENTATION
SiliconSystems' performance tests, ratings, and product specifications are measured using specific computer systems and/or
components and reflect the approximate performance of SiliconSystems’ products as measured by those tests. Any difference in
system hardware or software design or configuration, as well as system use, may affect actual test results, ratings, and product
specifications. SiliconSystems welcomes user comments and reserves the right to revise this document and/or make updates to
product specifications, products, or programs described without notice at any time. SiliconSystems makes no representations or
warranties regarding this document. The names of actual companies and products mentioned herein are the trademarks of their
respective owners.
SiliconSystems™, SiliconDrive™, SiliconDrive Secure™, PowerArmor™, SiSMART™, SiKey™, SiZone™, SiProtect™, SiSecure™,
SiSweep™, SiPurge™, SiScrub™, SiliconDrive Blade™, SiliconDrive Edge™, and the SiliconSystems logo are trademarks or
registered trademarks of SiliconSystems, Inc. and may be used publicly only with the permission of SiliconSystems and require proper
acknowledgement. Other listed names and brands are trademarks or registered trademarks of their respective owners.
© Copyright 2008 by SiliconSystems, Inc. All rights reserved. No part of this publication may be reproduced without the prior written
consent of SiliconSystems.
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DOCUMENT: 3650H-02DSR
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